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| MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14049UB Hex Buffers The MC14049UB hex inverter/buffer is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. This device provides logic-level conversion using only one supply voltage, VDD. The input-signal high level (V IH ) can exceed the V DD supply voltage for logic-level conversions. Two TTL/DTL Loads can be driven when the device is used as CMOS-to-TTL/DTL converters (VDD = 5.0 V, VOL 0.4 V, IOL 3.2 mA). Note that pins 13 and 16 are not connected internally on this device; consequently connections to these terminals will not affect circuit operation. L SUFFIX CERAMIC CASE 620 P SUFFIX PLASTIC CASE 648 v IIIIIIIIIIIIIIIIIIIII I II III I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIIIII I II III I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II III I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII II IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII IIIIIIII I I II IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII IIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I II IIIIIIIIIIIIIIIIIIIII MAXIMUM RATINGS* (Voltages Referenced to VSS) Rating Symbol VDD Vin DC Supply Voltage Value Unit V V V - 0.5 to + 18 - 0.5 to + 18 Input Voltage (DC or Transient) Output Voltage (DC or Transient) Vout Iin - 0.5 to VDD + 0.5 10 Input Current (DC or Transient), per Pin mA mA Output Current (DC or Transient), per Pin Power Dissipation, per Package Plastic/Ceramic SOIC Storage Temperature Iout PD + 45 825 740 mW Tstg TL - 65 to + 150 260 * * * * * * High Source and Sink Currents High-to-Low Level Converter Supply Voltage Range = 3.0 V to 18 V Meets JEDEC UB Specifications VIN can exceed VDD Improved ESD Protection on All Inputs D SUFFIX SOIC CASE 751B ORDERING INFORMATION MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC TA = - 55 to 125C for all packages. LOGIC DIAGRAM MC14049UB 3 5 7 9 11 14 NC = PIN 13, 16 VSS = PIN 8 VDD = PIN 1 2 4 6 10 12 15 _C _C Lead Temperature (8-Second Soldering) * Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: All Packages: See Figure 4. CIRCUIT SCHEMATIC (1/6 OF CIRCUIT SHOWN) MC14049UB VDD VSS REV 3 1/94 (c)MOTOROLA CMOS LOGIC DATA Motorola, Inc. 1995 MC14049UB 1 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I III I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I III I I I I I I I I I II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I III I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I III I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I III I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I III I I I I I I I I I I II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I III IIII I III IIIIIIIIIIIIIIIII II II II III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II II II III I IIIII IIIIII IIII I I I II II II III I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII ** The formulas given are for the typical characteristics only at 25_C. To calculate total supply current at loads other than 50 pF: #Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. IT(CL) = IT(50 pF) + (CL - 50) Vfk where: IT is in A (per package), CL in pF, V = (VDD - VSS) in volts, f in kHz is input frequency, and k = 0.002. ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Total Supply Current** (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) Quiescent Current (Per Package) Input Capacitance (Vin = 0) Input Current Output Drive Current (VOH = 2.5 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) Input Voltage (VO = 4.5 Vdc) (VO = 9.0 Vdc) (VO = 13.5 Vdc) Output Voltage Vin = VDD or 0 MC14049UB 2 (VO = 0.5 Vdc) (VO = 1.0 Vdc) (VO = 1.5 Vdc) Vin = 0 or VDD (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Characteristic "1" Level "0" Level "1" Level "0" Level Source Sink Symbol VOH VOL IOH IDD VIH IOL Cin VIL Iin IT VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 15 -- 4.95 9.95 14.95 - 1.6 - 1.6 - 4.7 4.0 8.0 12.5 3.75 10 30 Min -- -- -- -- -- -- -- -- -- -- -- - 55_C 0.1 0.05 0.05 0.05 Max 1.0 2.0 4.0 1.0 2.0 2.5 -- -- -- -- -- -- -- -- -- -- -- -- -- - 1.25 - 1.3 - 3.75 4.95 9.95 14.95 4.0 8.0 12.5 Min 3.2 8.0 24 -- -- -- -- -- -- -- -- -- -- -- 0.00001 0.002 0.004 0.006 25_C - 2.5 - 2.6 - 10 2.75 5.50 8.25 2.25 4.50 6.75 Typ 6.0 16 40 5.0 10 15 10 0 0 0 IT = (1.8 A/kHz) f + IDD IT = (3.5 A/kHz) f + IDD IT = (5.3 A/kHz) f + IDD MOTOROLA CMOS LOGIC DATA 0.1 0.05 0.05 0.05 Max 1.0 2.0 4.0 1.0 2.0 2.5 20 -- -- -- -- -- -- -- -- -- -- -- -- 4.95 9.95 14.95 - 1.0 - 1.0 - 3.0 4.0 8.0 12.5 Min 2.6 6.6 19 -- -- -- -- -- -- -- -- -- -- -- 125_C 1.0 0.05 0.05 0.05 Max 30 60 120 1.0 2.0 2.5 -- -- -- -- -- -- -- -- -- -- -- -- -- mAdc mAdc Adc Adc Adc Unit Vdc Vdc Vdc Vdc pF IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II III I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II III I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II III I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II III I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII III II II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII * The formulas given are for the typical characteristics only at 25_C. #Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. SWITCHING CHARACTERISTICS* (CL = 50 pF, TA = 25_C) Propagation Delay Time tPHL = (0.38 ns/pF) CL + 11 ns tPHL = (0.12 ns/PF) CL + 9 ns tPHL = (0.11 ns/pF) CL + 4.5 ns Propagation Delay Time tPLH = (0.38 ns/pF) CL + 61 ns tPLH = (0.20 ns/pF) CL + 30 ns tPLH = (0.11 ns/pF) CL + 24.5 ns Output Fall Time tTHL = (0.3 ns/pF) CL + 25 ns tTHL = (0.12 ns/pF) CL + 14 ns tTHL = (0.1 ns/pF) CL + 10 ns Output Rise Time tTLH = (0.8 ns/pF) CL + 60 ns tTLH = (0.3 ns/pF) CL + 35 ns tTLH = (0.27 ns/pF) CL + 26.5 ns MOTOROLA CMOS LOGIC DATA Characteristic Figure 1. Typical Voltage Transfer Characteristics versus Temperature Vout , OUTPUT VOLTAGE (Vdc) 10 15 18 5 VDD = 5 Vdc VDD = 10 Vdc VDD = 15 Vdc 5 10 Vin, INPUT VOLTAGE (Vdc) Symbol tPHL tPLH tTHL tTLH +125C - 55C VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 15 Min -- -- -- -- -- -- -- -- -- -- -- -- 18 Typ # 100 50 40 30 15 10 80 40 30 40 20 15 Max 120 65 50 160 100 60 60 30 20 60 40 30 MC14049UB 3 Unit ns ns ns ns VDD 1 IOH 8 0 I OH , OUTPUT SOURCE CURRNT (mAdc) VGS = 5.0 Vdc VSS VDS = VOH - VDD 160 I OL, OUTPUT SINK CURRENT (mAdc) VOH 8 VDD 1 IOL VSS VDD = VOL VGS = 15 Vdc VOL - 10 120 - 20 VGS = 10 Vdc 80 VGS = 10 Vdc - 30 MAXIMUM CURRENT LEVEL 40 VGS = 5.0 Vdc 0 0 2.0 4.0 6.0 8.0 VDS, DRAIN-TO-SOURCE VOLTAGE (Vdc) 10 - 40 VGS = 15 Vdc MAXIMUM CURRENT LEVEL 0 - 50 - 10 - 8.0 - 6.0 - 4.0 - 2.0 VDS, DRAIN-TO-SOURCE VOLTAGE (Vdc) Figure 2. Typical Output Source Characteristics Figure 3. Typical Output Sink Characteristics VDD 1 PULSE GENERATOR PD , MAXIMUM POWER DISSIPATION (mW) PER PACKAGE 1200 1100 1000 900 825 800 740 700 600 500 400 300 200 100 0 25 (D) SOIC 260 mW (L) 175 mW (P) 120 mW (D) 150 175 Vin 8 VSS CL Vout (L) CERAMIC (P) PDIP 20 ns INPUT 90% 50% 10% tPHL OUTPUT 90% 50% 10% tTHL 20 ns VDD VSS tPLH VOH 50 75 100 125 TA, AMBIENT TEMPERATURE (C) tTLH VOL Figure 4. Ambient Temperature Power Derating Figure 5. Switching Time Test Circuit and Waveforms PIN ASSIGNMENT VDD OUTA INA OUTB INB OUTC INC VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 NC OUTF INF NC OUTE INE OUTD IND This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields referenced to the VSS pin, only. Extra precautions must be taken to avoid applications of any voltage higher than the maximum rated voltages to this high-impedance circuit. For proper operation, the ranges VSS Vin 18 V and VSS Vout VDD are recommended. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. NC = NO CONNECTION MC14049UB 4 MOTOROLA CMOS LOGIC DATA OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620-10 ISSUE V -A- 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. DIM A B C D E F G H K L M N INCHES MIN MAX 0.750 0.785 0.240 0.295 --- 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 --- 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 -B- 1 8 C L -T- SEATING PLANE N E F D G 16 PL K M J 16 PL 0.25 (0.010) M M TB S 0.25 (0.010) TA S P SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R -A- 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 B 1 8 F S C L -T- H G D 16 PL SEATING PLANE K J TA M M 0.25 (0.010) M MOTOROLA CMOS LOGIC DATA MC14049UB 5 OUTLINE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J -A- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 16 9 -B- 1 8 P 8 PL 0.25 (0.010) M B S G F K C -T- SEATING PLANE R X 45 _ M D 16 PL M J 0.25 (0.010) TB S A S DIM A B C D F G J K M P R Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 MC14049UB 6 *MC14049UB/D* MOTOROLA CMOS LOGIC DATA MC14049UB/D |
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